First CHERI RISC-V Embedded Chip Launches with Early Access Program

SCI Semiconductor in Cambridge has developed the first CHERI-enabled family of chips for embedded designs.

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The ICENI microcontroller chips are based on the RISC-V RV32E architecture and using the Microsoft CHERIoT-Ibex processor core. The chips are built by GlobalFoundries and is aimed at a wide variety of applications, spanning from simple microcontrollers through to advanced microprocessor applications with availability in 2025.

The first device is a single core microcontroller but the company is planning multicore and has designed an extended temperature version with a view to the automotive market, Haydn Povey, Chief Executive, SCI Semiconductor tells eeNews Europe

The CHERIoT technology uses a hardware architecture that avoids memory safety issues. As well as developing its own devices, the company is supplying IP to a tier one supplier for a system on chip (SoC) design.

“We are riding both horses at the moment as the primary goal is a device maker as the biggest challenge is being able to buy the technology for automotive, smart energy and telecoms. We have a design that is qualified for extended temperature operation and we have partners looking at after market telematics applications. Moving to autonomous vehicles means more communications and that increases the attack surfaces,” he said.

Over 70% of modern software vulnerabilities are based on these memory safety software issues, creating the explosion of cyber-security attacks taking advantage of memory misconfiguration and software-reuse issues to rapidly escalate attacks and are endemic in modern code bases globally.

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The ICENI family of microprocessors from SCI Semiconductor use the 32bit CHERIoT-Ibex RISC-V core for the world’s first high-integrity intrinsically-Memory Safe devices. The device architecture, integrating fine-grained hardware enforced compartmentalisation, supports complete spatial and temporal memory safety.

This supports existing code with a compilation without rewriting the C code, and has an overhead of 1 to 3%, says David Chisnall, co-founder of SCI Semiconductor and Director of Systems Architecture.

“Everything on the market is embarrassing,” said Chisnall at the High Integrity Systems Conference yesterday.. “You are trying to replace appliances that people expect to last ten years but companies think three years is long term support and they are building these in an incredibly cost sensitive environment so the hardware is not able to support the features that we rely on for security. So we looked at designing the hardware and software stack from the ground up with all the things we have learned since the 1960s.”

“We have a production quality core, and an open source core is great with an FGPA dev system but if you actually want to deploy this in production you just want to buy a chip and that’s what we are doing at SCI Semiconductor,” he added.

“The ICENI family marks the start of a new epoch of secured devices, secured applications, and secured society,” said Povey. “The modern cyber-security industry is focused on treating the technological symptoms of poor hardware and software architecture, with CHERI and the new ICENI device family, we can now finally start to treat the disease, enabling rapidly code reuse without importing vulnerabilities, accelerating development and reducing update requirements.” 

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The ICENI family of devices uses the open-source CHERIoT Platform originally developed by Microsoft Research and now maintained as a cross-vendor open-source project, with Microsoft and SCI Semiconductor as co-owners of the repository, along with contributions from Google and a  rapidly evolving host of ecosystem partners including open source hardware developer lowRISC.

“Microsoft is pleased to see that the open source CHERIoT Ibex core is being used by SCI Semiconductor in an upcoming silicon product. We believe that CHERI is a promising technology that can be used to enhance computer security, and we are happy to see it making its way into production silicon. This is one of the main reasons why Microsoft developed and open sourced the CHERIoT Ibex core,” said  David Weston, VP of Enterprise and OS Security at Microsoft.

SCI has also launched an Early Access Program, which will enable selected customers and partners early access to silicon devices, alongside advanced development systems. These systems use the lowRISC FPGA Sonata platform enabled by the UKRI Digital Security by Design programme.

Selected partners can start development immediately on the EAC program with rapid portability to silicon devices in 2025, accelerating to transition to next-generation Memory Safe systems.

SCI Semiconductors has also signed a strategic distribution deal with EPS Global, which also handles  IC Programming and Embedded Security for automotive Tier One suppliers and contract manufacturers.

“SCI’s value proposition is compelling, and they’re ahead of the market in terms of delivery,” said Colin Lynch, CEO at EPS Global. “They are providing key security chips that meet customers’ needs for secure-by-design solutions. The key markets are in critical infrastructure, defense, automotive, and aerospace. EPS Global can add significant value in this space through our customer engagement, distribution expertise, and secure provisioning capabilities.”

SCI Semiconductors is a founder member of the CHERI Alliance, and was formed to lead the commercialisation of CHERI technologies, which took on the SDK developed by Codasip in Germany for CHERI RISC-V cores for SoCs and automotive designs.

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